Blog
February 25, 2010 on 6:12
A few days ago I started playing around with Objective-C and Cocoa. Here's the first result. You gotta start somewhere ;)
August 5, 2009 on 2:46
I've implemented a brute-force solver for sudoku puzzles in PHP. A web app and the source code can be found at http://pretopia.net/sudoku.php.
July 19, 2009 on 5:25
Q: How many hardware engineers does it take to change a light bulb?
A: None. We'll fix it in software.
Q: How many system programmers does it take to change a light bulb?
A: None. The application can work around it.
Q: How many software engineers does it take to change a light bulb?
A: None. We'll document it in the manual.
Q: How many tech writers does it take to change a light bulb?
A: None. The user can figure it out.
A: None. We'll fix it in software.
Q: How many system programmers does it take to change a light bulb?
A: None. The application can work around it.
Q: How many software engineers does it take to change a light bulb?
A: None. We'll document it in the manual.
Q: How many tech writers does it take to change a light bulb?
A: None. The user can figure it out.
October 4, 2008 on 21:56
Yesterday I officially obtained my Master of Science degree :-)
September 29, 2008 on 21:45
Last Saturday (September 27) I went xkcd geohashing (check out this and this page if you're not familiar with the concept). Wouter accidentally (hmm... right) found out that this week's meeting point in our graticule was just a few kilometers from our place. Together with André we went geohashing, not expecting to see anybody else at the point. However, when we arrived, there was also another guy: Joris. We did not plan to arrive at the official meetup time (16:00), as we didn't expect anybody else to show up. Luckily we arrived only a few minutes past four, otherwise we would have missed him. More pictures can be found here.
August 30, 2008 on 15:44
This morning I got an email from the International Conference on Field-Programmable Technology (ICFPT) 2008, informing me that my paper about ρ-VEX has been accepted for publication at the conference :-). ρ-VEX will be presented by means of a poster presentation at the conference.
My MSc thesis is also finished. It will be available at the ρ-VEX project website soon, together with the ICFPT paper.
July 17, 2008 on 21:03
I created a Google Code project page for ρ-VEX, which can be found at http://r-vex.googlecode.com. In addition to the code available via the Subversion repository I created a tarball with a code snapshot, available at the downloads page. I wrote a quickstart guide to quickly deploy r-VEX on a Xilinx University Program Virtex-II Pro FPGA board, which can be viewed as a wiki page. More documentation will follow soon, as I started writing material for my MSc thesis. As soon as I have more information about the acceptance of the ρ-VEX paper, I'll make it also available.
July 12, 2008 on 14:41
I've just created a repository at Google Code, to host my projects. I'm currently using a Subversion repository at university, but because I'm almost graduated I thought it was safer to host my projects somewhere else. My arkanoid and uart projects are currently there. More to follow. The repository can be found at http://pretopia.googlecode.com. I will probably also create a separate repository for my ρ-VEX MSc project soon.
I'm currently working on ρ-ASM, the assembler/instrucion ROM generator for ρ-VEX. It's a 2-pass assembler written in C. Most of it is working now, I'm currently fine-tuning some things.
I'm currently working on ρ-ASM, the assembler/instrucion ROM generator for ρ-VEX. It's a 2-pass assembler written in C. Most of it is working now, I'm currently fine-tuning some things.
June 25, 2008 on 14:45
No updates for a while, but I'm happy to write that ρ-VEX is a VLIW processor since a few weeks. Its design allows easy adjustment of the operation/syllable issue width; I performed benchmarks with 1-, 2- and 4-issue ρ-VEX configurations. Additionally, ρ-VEX has support for custom operations through an easily extensible mechanism.
May 27, 2008 on 20:58
I designed an interface between the RS232 UART module that I designed earlier, and the current prototype of the RISC version of ρ-VEX. The interface dumps the contents of the data memory in ASCII (human-readable) over an RS232 port. So no silly debugging with LEDs and DIP switches anymore :)
BTW, the contents of address 0x00 represent the 20th Fibonacci number. Now on to VLIW'ing ρ-VEX.
BTW, the contents of address 0x00 represent the 20th Fibonacci number. Now on to VLIW'ing ρ-VEX.
May 20, 2008 on 16:12
It seems that I have finished a prototype for the unpipelined RISC edition of ρ-VEX. Pipelining should not be that much work, as I designed the processor already with pipeline stages. I just have to re-route some stage-enable signals, and add a flushing mechanism.
As a benchmark application, I wrote a small piece of VEX assembly code that calculates the value of iteration n+2 of the Fibonacci Sequence:
add $r1, $r0, 1
add $r6, $r0, n
FIBONACCI:
br $b5, END
cmpeq $b5, $r3, $r6
add $r3, $r3, 1
mov $r4, $r1
add $r1, $r1, $r2
mov $r2, $r4
goto FIBONACCI
END:
stop
The value of iteration n will reside in general purpose register $r1 after calculation has finished.
Before enhancing ρ-VEX with enabled pipelining and VLIW (4-issue) support, I'll first integrate the design as a co-processor within a MOLEN custom computing unit. When this implementation results in nice benchmarks, I'll start working on a paper to be submitted for the HiPEAC 2009 conference.
April 30, 2008 on 17:42
Some time ago I got a small 2-line LCD from the Phidgets series. This small application routes the BitchX IRC log to the LCD, using the Phidgets API.
April 25, 2008 on 21:46
The RISC version of ρ-VEX is now able to execute ALU and multiplier instructions from a separate instruction memory. I tested it on Xilinx Virtex-II Pro and Spartan-3E FPGAs. I connected the register file output to an array of LEDs, with a couple of switches to select the register to be visualized. Next up is the implementation of load/store instructions (and a data memory) and control instructions like branches and jumps. As a test-application, ρ-VEX calculates the first 11 iterations of Fibonacci's sequence.
April 14, 2008 on 20:23
Wouter Hordijk created a very funny mock-up of the pretopia.net frontpage.
I also uploaded a video of my arkanoid project to YouTube.
April 13, 2008 on 20:35
From now on I will use my blog as a feed with updates about my projects and activities, next to some photos that I shoot with my cellular phone. I embedded this blog on my website pretopia.net.
Last week I designed a simple UART. It was designed mainly for hardware debugging purposes, as I am working on the implementation of my ρ-VEX CPU. I added this UART to the projects page. When I find some time, I will be working on a Debug-over-UART framework which provides a flexible hardware debugging interface as a VHDL package. I decided to put my source code for some of the projects online. Links to code of different projects can be found at the projects page, or just browse the code/ directory.
Last week I designed a simple UART. It was designed mainly for hardware debugging purposes, as I am working on the implementation of my ρ-VEX CPU. I added this UART to the projects page. When I find some time, I will be working on a Debug-over-UART framework which provides a flexible hardware debugging interface as a VHDL package. I decided to put my source code for some of the projects online. Links to code of different projects can be found at the projects page, or just browse the code/ directory.
